H. Hu (PRC)
Radar; processor; phased array pulse Doppler radar; improvement factor; simulation
Phased array pulse Doppler radar processors contain kernel and key techniques for modern radar. For the typical structure of the processor we present the design and the methods for realization of some key techniques, such as direct IF sampling and digital coherent detectionDBF in subarrayMTIdigital pulse compression, channel mismatch correction etc.. In applying these methods we perform computer simulation on the entire processor in the presence of clutter and noise background. We obtain a system improvement factor of more than 90 dB when only amplitude clutter is included. We discuss some of the techniques employed in the modern radar processorsand draw some useful conclusions.
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