T.-H. Tsai, P.J. Hurst, and S.H. Lewis (USA)
Analog circuits, digital signal processing, communicationsystems, calibration
Techniques to overcome the errors caused by the offset, gain, and sample-time mismatches among time interleaved analog-to-digital converters (ADCs) in high speed digital communication systems are presented. The errors introduced by these mismatches are adaptively corrected using digital signal processing blocks. Sample time errors are corrected by modifying the operation of the existing adaptive receive equalizer to reduce the hardware overhead. Simulations are presented that show that the gain, offset, and sample-time mismatches are corrected by the adaptive loops.
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