K.-K. Mok, C.-F. Chan, C.-S. Choy, and K.-P. Pun (PRC)
RFID, adiabatic logic, & adiabatic RFID
This paper presents a 13.56MHz read-only RFID based on Adiabatic Quasi-Static CMOS (AQS-CMOS) logic, which stores a 64-bits ID code and supports 200kbps data readout for use in-item level identification. AC-powered AQS-CMOS logic allows the RFID to be directly powered by the RF carrier without the need for an RF to DC generator circuit. This new architecture reduces the chip size and power consumption of the RFID. A 64-bits RFID test chip fabricated in a 0.35 micron CMOS process occupies 0.23mm2 and consumes 20 mW.
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