Kamaraj Arunachalam, Marichamy Perumalsamy, C. Kalyana Sundaram, and J. Senthil Kumar
Reversible logic, Feynman gate, Fredkin gate, Peres gate, ALU,control unit
An important requirement of a digital system design is to reduce the power dissipation. Reversible logic is an emerging technique, which has the ability to reduce power dissipation. The reversible circuits do not lose information and can generate unique outputs from specified inputs and vice versa. There is no loss of bits during its computation, which results in reduction in power dissipation. In this paper, an 8-bit arithmetic and logic unit (ALU) using reversible logic circuits is proposed and designed in Verilog HDL. The synthesis and implementation result show that the proposed ALU improves by 39% in terms of power dissipation and 10% in terms of propagation delay over the ALU using conventional circuits. It has application in diverse fields such as low-power complementary metal oxide semiconductor (CMOS) design, optical information processing, cryptography, quantum computation and nanotechnology.
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